From Simple Pipelines to Chip Multiprocessors
$76.00 ( ) USD
- Author: Jean-Loup Baer, University of Washington
Adobe eBook Reader
Other available formats:
Looking for an examination copy?
If you are interested in the title for your course we can consider offering an examination copy. To register your interest please contact email@example.com providing details of the course you are teaching.
This book gives a comprehensive description of the architecture of microprocessors from simple in-order short pipeline designs to out-of-order superscalars. It discusses topics such as – the policies and mechanisms needed for out-of-order processing such as register renaming, reservation stations, and reorder buffers – optimizations for high performance such as branch predictors, instruction scheduling, and load-store speculations – design choices and enhancements to tolerate latency in the cache hierarchy of single and multiple processors – state-of-the-art multithreading and multiprocessing emphasizing single chip implementations Topics are presented as conceptual ideas, with metrics to assess the performance impact, if appropriate, and examples of realization. The emphasis is on how things work at a black box and algorithmic level. The author also provides sufficient detail at the register transfer level so that readers can appreciate how design features enhance performance as well as complexity.Read more
- Describes how components of a microprocessor work at a black box and algorithmic level often using pseudo-code
- Has current and historical examples drawn from commercial systems (in side-bars) and research projects
- Consistently presents topics from conceptual ideas to alternate ways of implementation providing performance metrics whenever possible
Reviews & endorsements
"Professor Baer has developed an extremely appropriate and timely textbook for computer architecture, with a focus on how processors work, and how select micro-architectural features work. He is an excellent teacher, and has effectively presented and explained the concepts. The text covers all the major subjects necessary for a semester-long course in computer architecture."
Patrick Crowley, Washington University in St. LouisSee more reviews
"Overall, I believe that the book will serve as a useful textbook for explaining concepts related to the architecture of microprocessors to undergraduate and graduate students."
S. V. Nagaraj, Computing Reviews
Not yet reviewed
Be the first to review
Review was not posted due to profanity×
- Date Published: February 2010
- format: Adobe eBook Reader
- isbn: 9780511669361
- contains: 104 b/w illus. 20 tables 117 exercises
- availability: This ISBN is for an eBook version which is distributed on our behalf by a third party.
Table of Contents
2. The basics
3. Superscalar processors
4. Front-end: branch prediction, instruction fetching, and register renaming
5. Back-end: instruction scheduling, memory access instructions, and clusters
6. The cache hierarchy
8. Multithreading and (chip) multiprocessors
9. Current limitations and future challenges.
Find resources associated with this titleYour search for '' returned .
Type Name Unlocked * Format Size
*This title has one or more locked files and access is given only to instructors adopting the textbook for their class. We need to enforce this strictly so that solutions are not made available to students. To gain access to locked resources you either need first to sign in or register for an account.
These resources are provided free of charge by Cambridge University Press with permission of the author of the corresponding work, but are subject to copyright. You are permitted to view, print and download these resources for your own personal use only, provided any copyright lines on the resources are not removed or altered in any way. Any other use, including but not limited to distribution of the resources in modified form, or via electronic or other media, is strictly prohibited unless you have permission from the author of the corresponding work and provided you give appropriate acknowledgement of the source.
If you are having problems accessing these resources please email firstname.lastname@example.org
Instructors have used or reviewed this title for the following courses
- Computer Architecture lll
- Computer Design
- Computer Systems Architecture
- Microprocessor Architecture
Sorry, this resource is locked
Please register or sign in to request access. If you are having problems accessing these resources please email email@example.comRegister Sign in
You are now leaving the Cambridge University Press website. Your eBook purchase and download will be completed by our partner www.ebooks.com. Please see the permission section of the www.ebooks.com catalogue page for details of the print & copy limits on our eBooks.Continue ×