Systematic Design of Analog CMOS Circuits
Using Pre-Computed Lookup Tables
$76.00 ( ) USD
- Paul G. A. Jespers, Université Catholique de Louvain, Belgium
- Boris Murmann, Stanford University, California
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Discover a fresh approach to efficient and insight-driven analog integrated circuit design in nanoscale-CMOS with this hands-on guide. Expert authors present a sizing methodology that employs SPICE-generated lookup tables, enabling close agreement between hand analysis and simulation. This enables the exploration of analog circuit tradeoffs using the gm/ID ratio as a central variable in script-based design flows, and eliminates time-consuming iterations in a circuit simulator. Supported by downloadable MATLAB code, and including over forty detailed worked examples, this book will provide professional analog circuit designers, researchers, and graduate students with the theoretical know-how and practical tools needed to acquire a systematic and re-use oriented design style for analog integrated circuits in modern CMOS.Read more
- Presents an efficient methodology for the sizing of analog integrated circuits leveraging classical circuit analysis results
- Emphasizes compatibility with nanoscale CMOS, systematic design thinking and design for reuse
- Supported by forty-five worked examples and downloadable MATLAB code
Reviews & endorsements
'Analog design generates insight, but requires expertise. To build up such expertise, analytic models are used to create design procedures. Indeed, analytic models easily allow device sizing from specifications. They lack accuracy, however. The models of present-day nanometer MOS transistors have become rather complicated. On the other hand SPICE simulations do provide the required accuracy but don’t generate as much insight. The use of SPICE-generated lookup tables, as described in this book, provides an excellent compromise. The accuracy is derived from SPICE, and the design procedure itself is made through MATLAB employing parameters like gm/ID. As a result, a considerable amount of intuition can be built up. Such design procedure is highly recommended to whoever wants to gain insight by doing analog design, without losing the accuracy of real SPICE simulations.' Willy Sansen, Katholieke Universiteit Leuven, BelgiumSee more reviews
'With the advent of sub-micron MOS transistors more than two decades ago, traditional design based on the square-law model is no longer adequate. Alternatives such as ‘tweaking’ with SPICE or relying on more sophisticated device models do not provide the circuit insight necessary for optimized design or are too mathematically complex. The design methodology presented in this book overcomes these shortcomings. A focus on fundamental design parameters - dynamic range, bandwidth, power dissipation - naturally leads to optimized solutions, while relying on transistor data extracted with the simulator ensures agreement between design and verification. Comprehensive design examples of common blocks such as OTAs show how to readily apply these concepts in practice. This book fixes what has been broken with analog design for more than twenty years. I recommend it to experts and novices alike.' Bernhard Boser, University of California, Berkeley
'The authors present a clever solution to capture the precision of the best MOSFET models, current or future, in a comprehensive and efficient design flow compatible with nanometric CMOS processes. In this book, you will also enjoy a wealth of invaluable information to deepen your analog design skills.' Yves Leduc, Polytech Nice-Sophia, France
'Jespers and Murmann have taken a hard look at a notoriously thorny problem and produced a work of great clarity and practical value. This book will be a tremendous help to analog designers of all experience levels.' Joel Dawson, Massachusetts Institute of Technology
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- Date Published: September 2017
- format: Adobe eBook Reader
- isbn: 9781108136730
- contains: 209 b/w illus. 45 tables
- availability: This ISBN is for an eBook version which is distributed on our behalf by a third party.
Table of Contents
2. Basic transistor modeling
3. Basic sizing using the gm/ID methodology
4. Noise, distortion, and mismatch
5. Practical circuit examples I
6. Practical circuit examples II.
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