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Using Verilog, a leading commercial hardware description language, this text describes how to specify, design, and test a complete digital system. After a brief introduction to the Verilog language, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined. The remainder of the book demonstrates how both behavioral and structural models can be developed and intermingled in Verilog.Read more
- This approach combines tools and methods of VLSI design
- Uses industry-standard Verilog hardware description software
- Complete ground-up approach covers all aspects of a real microprocessor design
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- Date Published: November 2007
- format: Paperback
- isbn: 9780521045728
- length: 176 pages
- dimensions: 244 x 170 x 10 mm
- weight: 0.29kg
- contains: 5 tables
- availability: Available
Table of Contents
1. Controlling complexity
2. A verilogical place to start
3. Defining the instruction set architecture
4. Algorithmic behavioral modeling
5. Building an assembler for VeSPA
7. Implementation of the pipelined processor
Appendix A: the VeSPA instruction set architecture (ISA)
Appendix B: the VASM assembler
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