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The increasingly demanding performance requirements of communications systems, as well as problems posed by the continued scaling of silicon technology, present numerous challenges for the design of frequency synthesizers in modern transceivers. This book contains everything you need to know for the efficient design of frequency synthesizers for today's communications applications. If you need to optimize performance and minimize design time, you will find this book invaluable. Using an intuitive yet rigorous approach, the authors describe simple analytical methods for the design of phase locked loop (PLL) frequency synthesizers using scaled silicon CMOS and bipolar technologies. The entire design process, from system-level specification to layout, is covered comprehensively. Practical design examples are included, and implementation issues are addressed. A key problem-solving resource for practitioners in IC design, the book will also be of interest to researchers and graduate students in electrical engineering.Read more
- Explains how to design PLL frequency synthesizers in scaled silicon CMOS and bipolar technologies
- Contains worked design examples using realistic design parameters, and also contains solutions to practical implementation issues
- Covers the whole design process from system-level specification to layout
Reviews & endorsements
"A good read...this book is practical and provides a good theoretical foundation."
Alfy Riddle, Associate Editor, IEEE Microwave Magazine
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- Date Published: July 2007
- format: Hardback
- isbn: 9780521863155
- length: 248 pages
- dimensions: 255 x 180 x 18 mm
- weight: 0.64kg
- contains: 179 b/w illus.
- availability: In stock
Table of Contents
1. Local oscillator requirements
2. Phase-Locked Loops
3. Fractional-N PLLs
4. Electronic oscillators
5. Noise in Oscillators
6.Reactive components in oscillators
7. Noise up-conversion in VCOs
8. Frequency division
9. Phase Comparison
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