Skip to content
Register Sign in Wishlist

Digital Design Using VHDL
A Systems Approach


  • Date Published: December 2015
  • availability: Available
  • format: Hardback
  • isbn: 9781107098862

$ 75.99

Add to cart Add to wishlist

Other available formats:

Request inspection copy

Lecturers may request a copy of this title for inspection

Product filter button
About the Authors
  • This introductory textbook provides students with a system-level perspective and the tools they need to understand, analyze and design digital systems. Going beyond the design of simple combinational and sequential modules, it shows how such modules are used to build complete systems, reflecting real-world digital design. All the essential topics are covered, including design and analysis of combinational and sequential modules, as well as system timing and synchronization. It also teaches how to write VHDL-2008 HDL in a productive and maintainable style that enables CAD tools to do much of the tedious work. A complete introduction to digital design is given through clear explanations, extensive examples and online VHDL files. The teaching package is completed with lecture slides, labs and a solutions manual for instructors. Assuming no previous digital knowledge, this textbook is ideal for undergraduate digital design courses that will prepare students for modern digital practice.

    • Takes a system-level approach that better prepares students for modern digital design in the real world
    • Includes all the essential topics, from composition of combinational modules to system timing and synchronization
    • Teaches students how to write VHDL-2008 HDL in a productive and maintainable style that enables modern CAD tools to do much of the tedious work
    • VHDL files, solutions, slides and labs are provided online
    Read more

    Customer reviews

    Review was not posted due to profanity


    , create a review

    (If you're not , sign out)

    Please enter the right captcha value
    Please enter a star rating.
    Your review must be a minimum of 12 words.

    How do you rate this item?


    Product details

    • Date Published: December 2015
    • format: Hardback
    • isbn: 9781107098862
    • dimensions: 239 x 193 x 36 mm
    • weight: 1.61kg
    • contains: 489 b/w illus. 68 tables
    • availability: Available
  • Table of Contents

    Part I. Introduction:
    1. The digital abstraction
    2. The practice of digital system design
    Part II. Combinational Logic:
    3. Boolean algebra
    4. CMOS logic circuits
    5. Delay and power of CMOS circuits
    6. Combinational logic design
    7. VHDL descriptions of combinational logic
    8. Combinational building blocks
    9. Combinational examples
    Part III. Arithmetic Circuits:
    10. Arithmetic circuits
    11. Fixed- and floating-point numbers
    12. Fast arithmetic circuits
    13. Arithmetic examples
    Part IV. Synchronous Sequential Logic:
    14. Sequential logic
    15. Timing constraints
    16. Datapath sequential logic
    17. Factoring finite-state machines
    18. Microcode
    19. Sequential examples
    Part V. Practical Design:
    20. Verification and test
    Part VI. System Design:
    21. System-level design
    22. Interface and system-level timing
    23. Pipelines
    24. Interconnect
    25. Memory systems
    Part VII. Asynchronous Logic:
    26. Asynchronous sequential circuits
    27. Flip-flops
    28. Metastability and synchronization failure
    29. Synchronizer design
    Appendix A. VHDL coding style
    Appendix B. VHDL syntax guide

  • Resources for

    Digital Design Using VHDL

    William J. Dally, R. Curtis Harting, Tor M. Aamodt

    Lecturer Resources

    Find resources associated with this title

    Type Name Unlocked * Format Size

    Showing of

    Back to top

    This title is supported by one or more locked resources. Access to locked resources is granted exclusively by Cambridge University Press to lecturers whose faculty status has been verified. To gain access to locked resources, lecturers should sign in to or register for a Cambridge user account.

    Please use locked resources responsibly and exercise your professional discretion when choosing how you share these materials with your students. Other lecturers may wish to use locked resources for assessment purposes and their usefulness is undermined when the source files (for example, solution manuals or test banks) are shared online or via social networks.

    Supplementary resources are subject to copyright. Lecturers are permitted to view, print or download these resources for use in their teaching, but may not change them or use them for commercial gain.

    If you are having problems accessing these resources please contact

  • Authors

    William J. Dally, Stanford University, California
    William J. Dally is the Willard R. and Inez Kerr Bell Professor of Engineering at Stanford University and Chief Scientist at NVIDIA Corporation. He and his group have developed system architecture, network architecture, signaling, routing and synchronization technology that can be found in most large parallel computers today. He is a Member of the National Academy of Engineering, a Fellow of the IEEE, a Fellow of the ACM and a Fellow of the American Academy of Arts and Sciences. He has received numerous honors including the ACM Eckert–Mauchly Award, the IEEE Seymour Cray Award and the ACM Maurice Wilkes Award.

    R. Curtis Harting, Google Inc., New York
    R. Curtis Harting is a Software Engineer at Google and holds a PhD from Stanford University. He graduated with honors in 2007 from Duke University with a BSE, majoring in Electrical and Computer Engineering and Computer Science. He received his MS in 2009 from Stanford University.

    Tor M. Aamodt, University of British Columbia, Vancouver
    Tor M. Aamodt is an Associate Professor in the Department of Electrical and Computer Engineering at the University of British Columbia. Alongside his graduate students, he developed the GPGPU-Sim simulator. Three of his papers related to the architecture of general purpose GPUs have been selected as 'Top Picks' by IEEE Micro Magazine and one as a 'Research Highlight' by Communications of the ACM magazine. He was a Visiting Associate Professor in the Computer Science Department at Stanford University during his 2012–2013 sabbatical, and from 2004 to 2006 he worked at NVIDIA on the memory system architecture ('framebuffer') of the GeForce 8 Series GPU.

Sign In

Please sign in to access your account


Not already registered? Create an account now. ×

Sorry, this resource is locked

Please register or sign in to request access. If you are having problems accessing these resources please email

Register Sign in
Please note that this file is password protected. You will be asked to input your password on the next screen.

» Proceed

You are now leaving the Cambridge University Press website. Your eBook purchase and download will be completed by our partner Please see the permission section of the catalogue page for details of the print & copy limits on our eBooks.

Continue ×

Continue ×

Continue ×

Find content that relates to you

Join us online

This site uses cookies to improve your experience. Read more Close

Are you sure you want to delete your account?

This cannot be undone.


Thank you for your feedback which will help us improve our service.

If you requested a response, we will make sure to get back to you shortly.

Please fill in the required fields in your feedback submission.